Sr. ASIC/FPGA Design Engineer Needed for a LiDAR Startup
- Greater SF Bay area
A startup who is rapidly beginning to take over the LiDAR industry in the Bay area is looking for a specific talent to join their team as a Sr. ASIC/FPGA Design Engineer. This individual would be responsible for working with System and Software Engineers, developing design specification and documentation.
If you are looking for a challenging next step that offers plentiful internal mobility with a highly competent team - This is the position for you!
The Senior ASIC/FPGA Design Engineer would be responsible for:
- Embedded CPU subsystem and architecture
- High-speed digital signal processing, computer vision or machine learning
- High performance serial interface protocols
- Low power design methodology
- Mixed-signal design
- FPGA prototyping
- In depth knowledge of high-speed digital design, multi-clock domain SOC and verification
- Familiar with industry standard EDA tools
The Senior ASIC/FPGA Design Engineer should have the following qualifications:
- S. or M.S. in Electrical Engineering required
- Minimum 5 years of ASIC design experience
- Strong RTL (Verilog/System Verilog/VHDL) coding skills